mos_8502 :verified: on Nostr: We think of chips as these black boxes that take inputs and give outputs. That ...

We think of chips as these black boxes that take inputs and give outputs. That mindset works, most of the time.

But at a certain point, you have to contend with the fact that you're dealing with real objects that obey the laws of physics, which means nothing is instant, all processes take time to complete, and sometimes things can interfere with each other.

In the case of Sentinel 65X, if care is not taken in managing the boot-up sequence, the unconfigured FPGA can cause some spurious behaviour while it configures itself, which can, sometimes, make the CPU crash. The solution came to me last night:

The W65C265S does not actually require external RAM or ROM to function as long as it has code in its internal RAM or ROM to run.

So what I do at boot time is, I hold the VERA in reset manually, delay for time X to make sure the reset takes effect, then copy a routine from external ROM to internal RAM, and jump to that routine in internal RAM.

That routine then *shuts off* the external address and data buses, thus protecting the CPU from any noise on the bus, before allowing the VERA to activate, and waiting for time Y to make sure it's done before re-activating the external bus and returning control to the external ROM.

Clever, no?

#Sentinel65X