On the lalambda summer school a chip archiecture from Samsung asked me what's new in #lisp since 1980s. After a long talk, I asked him about #riscv and the summary is following:
- RISC > CISC (perf/power consumption, required number of engineers, simplicity)
- RISC-V is basically a MIPS with some minor fixes and refactoring.
- RISC-V > ARM/MIPS due to absent of architecture fees.
- All major big techs incorporating RISC-V in their devices.
- RISC-V is growing, hyping and will keep growing.
Andrew Tropin /
npub1dg…2vtnu
2023-07-25 10:57:33
Author Public Key
npub1dg643nc4ummjgwp77gxrsht940u274xj977hl8r43ldxrgyr2lks32vtnuPublished at
2023-07-25 10:57:33Event JSON
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"content": "On the lalambda summer school a chip archiecture from Samsung asked me what's new in #lisp since 1980s. After a long talk, I asked him about #riscv and the summary is following: \n\n- RISC \u003e CISC (perf/power consumption, required number of engineers, simplicity)\n- RISC-V is basically a MIPS with some minor fixes and refactoring.\n- RISC-V \u003e ARM/MIPS due to absent of architecture fees.\n- All major big techs incorporating RISC-V in their devices. \n- RISC-V is growing, hyping and will keep growing.",
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